InSEQt Handbuch
Pre-Patchings
Oberer Teil:
CLOCK: CLK FM ->Clock Frequency CLK PWM ->Clock Puls WM
CV LFO: SPEED CV ->ROW B
LEVEL: MIX IN ->ROW B
MULTI: 1 (über dem M) ->Clock
SLEW: SLEW IN ->ROW A
S+H: S+H IN ->PW LFO TRIGGER ->Clock
DELAY: DELAY IN ->Clock
LENGTH: SEQ LENGTH ->16 Trigger/Gate input für Ende
Unterer Teil:
DIVIDER: IN ->Gate (CL OUT)
MULTI: 1 (Links vom M) ->Clock
Q (Qunatizier): 1 QUA IN ->CH 1 2 QUA IN ->CH 2 (Bei 2x8)
Oberer Teil by Tomcat, versuch einer Table....:
| Buchse | Art | Prepatched | Beschreibung |
|---|---|---|---|
| CLOCK: | |||
| CLK FM | IN | Clock Frequency | |
| CLK PWM | IN | Länge des Gates | |
| EXT CLK | IN | Externe Clock | |
| RESE | IN | Zurück auf Gate 1 | |
| PULSE | OUT | Gate als Puls | |
| SQUARE | OUT | Gate als Sägezahn | |
| HOLD | IN | Anhalten (Clock läuft weiter!) | |
| GATE: | |||
| GATE 1 - 16 | OUT | Einzelausgang pro Step | |
| PW LFO: | |||
| PULS | OUT | Rechteck LFO | |
| RAMP | OUT | \ LFO | |
| SYNC IN | IN | Zum Synchronisieren | |
| CV LFO: | |||
| SQUARE | OUT | Sägezahn LFO | |
| TRIANGLE | OUT | /\ LFO | |
| SPEED CV | IN | ROW B | Geschwindigkeit |
| LEVEL: | |||
| MIX IN | IN | ROW B | |
| LEVEL OUT + | OUT | ||
| LEVEL OUT - | OUT | ||
| MULTI: | |||
| 1 (über dem M) | IN | Clock | |
| 2-3 | OUT | ||
| SLEW: | |||
| SLEW IN | IN | ROW A | |
| RESET | IN | ||
| SLEW OUT | OUT | ||
| S+H: | |||
| S+H IN | IN | PW LFO | |
| TRIGGER | IN | Clock | |
| S+H OUT | OUT | ||
| DELAY: | |||
| DELAY IN | IN | Clock | |
| DEALY OUT | OUT | ||
| LENGTH: | |||
| SEQ TR OUT | OUT | Rechteck LFO | |
| SEQ LENGTH | IN | 16 | Trigger/Gate input für Ende |
| SEQ OUT: | |||
| ROW A | OUT | ||
| ROW B | OUT | ||
Unterer Teil, Tabellenversuch:
| Buchse | Art | Prepatched | Beschreibung |
|---|---|---|---|
| CLOCK+TRIGGER: | |||
| START | IN | ||
| START/STOP | IN | ||
| STEP | IN | Next Step 1 | |
| RESET | IN | Zurück auf Step 1 | |
| CL OUT | OUT | Gate (1,2 oder 3) | |
| QT CLK OUT | OUT | Quantizer Gate | |
| OUT BUS 1 | OUT | Gate 1 | |
| OUT BUS 2 | OUT | Gate 2 | |
| OUT BUS 3 | OUT | Gate 3 | |
| DIVIDER: | |||
| IN | IN | Gate (CL OUT) | |
| 1.n | OUT | Jeder 2/4/8/16/32/64/128. | |
| MULTI: | |||
| 1 (Links vom M) | IN | Clock | |
| 2-3 | OUT | ||
| MULTI: | |||
| 1 - 4 | |||
| Q (Qunatizier): | |||
| 1 QUA IN | IN | CH 1 | 1 Bei 1-16 und 1 Bei 2x8 |
| 2 QUA IN | IN | CH 2 | (Bei 2x8) 2 Bei 2x8 |
| CV 1 QUA IN | IN | Add to QUA 1 | |
| 1 QUA OUT | OUT | ||
| 2 QUA OUT | OUT | ||
| CL P1: | |||
| FM CLK | IN | Geschwindigkeit | |
| CLK PWM | IN | Gate Länge | |
| OUT POS 1 | OUT | - | |
| CH: | |||
| 1 CHA OUT | OUT | CV 1-16 bzw. 1-8 Bei 2x8 | |
| 2 CHA OUT | OUT | CV 1-16 bzw. 9-16 Bei 2x8 | |
| I1: | |||
| 1 INV IN | IN | ||
| 1 INV OUT | OUT | - INPUT? | |
| I2: | |||
| 2 INV IN | IN | ||
| 2 INV OUT | OUT | - INPUT? | |
| A: | |||
| 1 AND IN | IN | ||
| 2 AND IN | IN | ||
| AND OUT | OUT | ||
| O: | |||
| 1 OR IN | IN | ||
| 2 OR IN | IN | ||
| OR OUT | OUT | ||
| X: | |||
| 1 XOR IN | IN | ||
| 2 XOR IN | IN | ||
| XOR OUT | OUT | ||
Oberer Teil
Anzahl Schritte setzen
Entweder den Gate-Ausgang mit Reset-In verbinden oder mit dem Seq Length Eingang. Beim Reset-Eingang muss man allerdings das Folge-Gate benutzen (2 Schritte = Gate 3 mit Reset-In verbinden, statt Gate 2).
